1. Field of the Invention
The present invention relates to a structure of a semiconductor memory having floating gate electrodes, and a fabrication method for the same.
2. Description of the Related Art
A nonvolatile semiconductor memory, such as electronically erasable and programmable read-only memory (EEPROM), for example, is well-known as a conventional semiconductor memory.
The nonvolatile semiconductor memory is fabricated on a semiconductor substrate including a cell array region, low-voltage circuit regions adjacent to the cell array region, and high-voltage circuit regions adjacent to the cell array region and the low-voltage circuit regions.
Memory cell transistors are deployed in the cell array region, low-voltage transistors are deployed in the low-voltage circuit regions, and high-voltage transistors are deployed in the high-voltage circuit regions.
In fabrication of the nonvolatile semiconductor memory, a conductive film used for gate electrodes of the low-voltage transistors and the high-voltage (20 V or greater) transistors is formed before a device isolating film. Another conductive film and an ion-implantation prevention film are then formed on the conductive film for gate electrodes of the low-voltage transistors and the high-voltage transistors. The ion-implantation prevention film prevents impurity ions from being implanted in the gate electrodes during ion implantation for formation of source and drain regions.
Due to this ion-implantation prevention film, there is an increased burden on the mask material in the etching process for formation of the gate electrodes of the memory cell transistors, the low-voltage transistors, and the high-voltage transistors. Control of a tapering angle of the gate electrodes may be difficult due to this tendency. Embedding insulating films between the gate electrodes also may be difficult.